IBM has announced the development of the first chip manufactured using sub-nanometer technology, based on a 0.7-nanometer node, equivalent to 7 angstroms. This breakthrough represents a significant milestone for the semiconductor industry, as it makes it possible to integrate nearly 100 billion transistors into an area roughly the size of a fingernail.
Beyond the figure itself, the announcement reflects one of the major challenges currently facing microelectronics: continuing to improve the power, efficiency and density of chips at a time when traditional miniaturization is approaching increasingly complex physical limits.
An architecture based on nanostacking
The key to this development lies in the nanostack architecture, a nanostacking technology that allows transistors to be arranged in three-dimensional structures. Instead of relying solely on reducing surface dimensions, this solution takes advantage of the third dimension to integrate more logic into less space.
This approach makes it possible to optimize different layers of the chip according to performance or energy-efficiency requirements.
Not all transistors serve the same purpose: some need to prioritize speed, while others can be designed to reduce power consumption. Three-dimensional architecture therefore opens up new possibilities for designing more flexible chips adapted to advanced applications.
According to IBM, this technology could deliver up to 50% more performance or up to 70% greater energy efficiency compared with its 2 nm chips. These improvements are particularly relevant in areas such as artificial intelligence, cloud computing, data centers and future connected devices.
A technological milestone with an industrial path ahead
Although this is a highly significant breakthrough, it will not reach the market immediately. IBM places the first commercial adoption of this technology within a timeframe of several years. Between a technological demonstration and large-scale industrial manufacturing, there is a complex process involving validation, equipment, production and quality control.
“The future of semiconductors will not depend solely on making components smaller, but also on rethinking their architecture, materials and manufacturing processes.”
Even so, the announcement confirms that the industry continues to find new ways to move beyond the traditional limits of silicon.
For MicroNanoSpain, advances of this kind reinforce the importance of promoting a strong micro- and nanoelectronics ecosystem in Spain. The evolution of the chip industry requires innovative companies, research centers, universities, specialized infrastructures and skilled talent.
As the national competence center for micro- and nanoelectronics, MicroNanoSpain works to connect these capabilities, facilitate access to knowledge and infrastructure, and support the companies that are part of this strategic industry.
Breakthroughs such as the one presented by IBM show where the sector is heading and underline the need to continue strengthening Spain’s position within the European semiconductor ecosystem.
