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	<title>News &#8211; MicroNanoSpain</title>
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	<title>News &#8211; MicroNanoSpain</title>
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		<title>IBM presents the first sub-nanometer chip: a new breakthrough for the semiconductor industry</title>
		<link>https://micronanospain.org/ibm-first-sub-nanometer-chip/</link>
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		<dc:creator><![CDATA[MicroNanospain The Spanish Semiconductor Competer center]]></dc:creator>
		<pubDate>Wed, 01 Jul 2026 16:55:54 +0000</pubDate>
				<category><![CDATA[News]]></category>
		<category><![CDATA[chips]]></category>
		<category><![CDATA[IBM]]></category>
		<category><![CDATA[microelectronics]]></category>
		<category><![CDATA[nanostack]]></category>
		<category><![CDATA[semiconductors]]></category>
		<category><![CDATA[sub-nanometer technology]]></category>
		<guid isPermaLink="false">https://micronanospain.org/?p=8833</guid>

					<description><![CDATA[IBM announces a breakthrough in sub-nanometer technology that opens new paths to improve performance, efficiency and density in the semiconductor industry.]]></description>
										<content:encoded><![CDATA[<p>IBM has announced the development of the first chip manufactured using sub-nanometer technology, based on a 0.7-nanometer node, equivalent to 7 angstroms. This breakthrough represents a significant milestone for the semiconductor industry, as it <strong>makes it possible to integrate nearly 100 billion transistors into an area roughly the size of a fingernail.</strong></p>
<p>Beyond the figure itself, the announcement reflects one of the major challenges currently facing microelectronics: <strong>continuing to improve the power, efficiency and density of chips</strong> at a time when traditional miniaturization is approaching increasingly complex physical limits.</p>
<figure class="wp-block-image size-large"><img decoding="async" src="https://micronanospain.org/wp-content/uploads/2026/07/ibm-research-chip-wafer-banner-1024x384.jpg" alt="Silicon wafer and IBM Research chip in a laboratory"/><figcaption>Silicon wafer and experimental chip in the context of advanced semiconductor research. Image source: <a href="https://es.newsroom.ibm.com/announcements?item=122918" target="_blank" rel="noopener">https://es.newsroom.ibm.com/announcements?item=122918</a></figcaption></figure>
<h2>An architecture based on nanostacking</h2>
<p>The key to this development lies in the nanostack architecture, a nanostacking technology that allows transistors to be arranged in three-dimensional structures. Instead of relying solely on reducing surface dimensions, this solution takes advantage of the third dimension to integrate more logic into less space.</p>
<blockquote>
<p>This approach makes it possible to optimize different layers of the chip according to performance or energy-efficiency requirements.</p>
</blockquote>
<p>Not all transistors serve the same purpose: some need to prioritize speed, while others can be designed to reduce power consumption. Three-dimensional architecture therefore opens up new possibilities for designing more flexible chips adapted to advanced applications.</p>
<p>According to IBM, this technology could deliver up to 50% more performance or up to 70% greater energy efficiency compared with its 2 nm chips. These improvements are particularly relevant in areas such as artificial intelligence, cloud computing, data centers and future connected devices.</p>
<h2>A technological milestone with an industrial path ahead</h2>
<p>Although this is a highly significant breakthrough, it will not reach the market immediately. IBM places the first commercial adoption of this technology within a timeframe of several years. Between a technological demonstration and large-scale industrial manufacturing, there is a complex process involving validation, equipment, production and quality control.</p>
<blockquote>
<p>&ldquo;The future of semiconductors will not depend solely on making components smaller, but also on rethinking their architecture, materials and manufacturing processes.&rdquo;</p>
</blockquote>
<p>Even so, the announcement confirms that the industry continues to find new ways to move beyond the traditional limits of silicon.</p>
<p>For <a href="https://micronanospain.org/">MicroNanoSpain</a>, advances of this kind reinforce the importance of promoting a <a href="https://micronanospain.org/ecosystem/">strong micro- and nanoelectronics ecosystem in Spain</a>. The evolution of the chip industry requires innovative companies, research centers, universities, specialized infrastructures and skilled talent.</p>
<p>As the national competence center for micro- and nanoelectronics, MicroNanoSpain works to connect these capabilities, facilitate access to knowledge and infrastructure, and support the <a href="https://micronanospain.org/services/">companies that are part of this strategic industry</a>.</p>
<p>Breakthroughs such as the one presented by IBM show where the sector is heading and underline the need to continue strengthening Spain&#8217;s position within the European semiconductor ecosystem.</p>
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